A3372E3-4T AltaSens 1080p@60fps宽动态范围(WDR) CMOS sensor高清监控摄像机图像传感器
Arrow Electronics Corporation, Altera Corporation and NewKen Technologies Corporation have announced the availability of the industry's first full HD WDR 3G-SDI all-in-one solution to customers in China and Taiwan through Arrow Electronics. The all-inclusive solution, developed jointly by Arrow And NewKen and supported by Arrow, includes The Altera Cyclone® IV FPGA and CPLD security chips, Supported by Apical's HD WDR Full Image Signal Processing (ISP) pipeline IP and AltaSens' 1080P60 A3372E3-4T image sensor, this sensor provides very high quality images. This is conducive to the less experienced engineers to complete the video surveillance camera design project quickly and efficiently.
The biggest problem in designing surveillance camera is system integration. With this all-inclusive solution, the r&d team avoided system integration issues such as heat sink and system noise. Moreover, Arrow And NewKen provide flexible business models, including ODM, complete modules and one-time license open source code, to meet the needs of different users.
Current reference designs on the market are based on standard CMOS image sensors, which are limited by their inability to support a wide range of brightness levels from low brightness to direct sunlight, resulting in all-black or all-white video targets. The full HD WDR 3G-SDI all-inclusive solution solves this problem based on the WDR CMOS image sensor. Due to the large amount of data generated by these image sensors (20 bits per color x 1.2mPixels, 60 frames per second) that needs to be processed in the image sensor pipeline (ISP), the data volume is too large for in-chip processing. The Altera Cyclone IV FPGA is capable of handling high-throughput algorithms that convert raw image data into the standard digital output needed to produce sharp video images.
Erhaan Shaikh, Vice president and General manager of Altera Asia Pacific, said, "We are excited to offer our customers a high-performance, all-inclusive surveillance camera solution that is easy to use. With this solution, systems companies accelerate their march to market while highlighting product advantages by providing highly valuable advanced features to end users. Altera Cyclone IV series FPGA realizes low cost, low power consumption and high performance in surveillance camera application at the same time, and is very flexible. In addition, Altera, Arrow Electronics, and NewKen Technologies are committed to providing
Users provide excellent support and services to help them succeed."
"We are very excited to partner with Altera to develop this all-hd WDR 3G-SDI all-inclusive solution," said Jean Chung Lin, Vice president, Semiconductor Market, Asia Pacific, Allerga. Altera offers the industry's best field programmable gate array (FPGA) technology. This all-inclusive solution combines the Altera Cyclone® IV E FPGA and CPLD security chip, Supports Apical's HD WDR Full Image Signal Processing (ISP) pipeline IP and AltaSens' 1080P60 A3372E3-4T image sensor. Combination of Altera industry first HD WDR video monitoring chipset, arrow electronics company, providing complete turnkey solutions, technical support, professional supply chain management, as well as the support type of turnkey solution module, to help manufacturers to accelerate to launch more intelligent, higher ratio of the next generation of video surveillance camera system."
Paul Chen, General Manager of NewKen Technologies LTD commented: "As far as we know, there is no ASIC chip on the market that fully meets the WDR full HD ISP camera specification. To complete the WDR 3G-SDI camera project, not only very professional systems engineering experience is required, but also the support and resources of chip suppliers are required. NewKen uses the flexibility of FPGA design to realize the functions of WDR, combined with its own 3G-SDI basic results, to design a fully functional WDR 3G-SDI camera solution at a reasonable price for the industry. With Altera's comprehensive design resources and the technical support of Arrow Electronics, we decided to use Altera fpGas in our solution. In addition, the combination of the three companies to provide a comprehensive development platform reduces development costs and risks, enabling the product to be quickly brought to market and widely used."
Single-chip FPGA High Definition Internet Protocol Surveillance Camera (Altera)
2010-06-25 16:56
Altera Corporation today released the industry's first monolithic FPGA high definition (HD) Internet Protocol (IP) surveillance camera reference design, further providing extended FPGA solutions for the surveillance market. This unique solution uses Altera low-cost Cyclone® III or Cyclone IV FPGas and Eyelytics and Apical intellectual property, Support AltaSens' 1080P60 A3372E3-4T and Aptina's 720P60 MT9M033 HD Wide dynamic range (WDR) CMOS image sensor. This fully integrated solution helps surveillance equipment manufacturers reduce board area, reduce power consumption, improve flexibility and reduce development time compared to existing architectures using traditional digital signal processors and ASSP.
Traditional digital signal processors and ASSPs do not have the capability to process broadband data from 1080p and 720p WDR CMOS sensors (e.g., full HD gratings at 2200x1125 pixels x 16 + bits per pixel x 60 frames per second for greater than 2 Gbps bandwidth). Altera Cyclone family FPgas have the bandwidth and processing power required to handle the large amounts of data generated by today's HD WDR CMOS image sensors. In previous designs, HD WDR camera systems required fpGas to handle the "front-end" data processing, while the digital signal processor or ASSP handled the "back-end" video coding. All of these chips can now be replaced with an Altera? FPGA.
Altera HD Surveillance IP camera Reference design features include:
● Apical ISP's best-in-class WDR processing "IRIdix" as well as advanced temporal and spatial noise suppression capabilities.
● Apical "checkerboard de-mosaic" kernel for Altasens A3372E3-4T WDR mode.
● "3A" features, such as auto exposure and auto white balance on Altera Nios? II embedded soft core processors.
● Eyelytics' H.264 video encoder with 30 frames per second for primary class 720 lines, or 15 frames per second for 1080 lines.
● Altera's three-speed Ethernet MAC IP kernel.
By integrating all these functions into a single Altera FPGA without the need for a digital signal processor or ASSP, designers reduced board area, resulting in lower costs and power savings. The Altera single-chip solution reduces power consumption by more than 50 percent compared to previous designs.
This reference design bundled with a full set of intellectual property rights helped the designers jump-start camera development, cutting the development time by nearly a year. All camera designers need to do is customize the FPGA with their own specific functions, such as adding their own software for motion detection, panorama, pitch, and zoom control.
"Much like the video display industry, our surveillance market users want high-quality video images," said Michael Samuelian, director of Altera's Industrial and automotive business. Altera realized complete single chip solution, not only adapt to the from standard definition to high-definition, from standard CMOS sensor to the WDR CMOS sensor development trend, and to help monitor camera designers on the Internet protocol networks in a cost-effective transfer high-resolution images, thus the further development of the video surveillance technology."
Beijing Altera (NASDAQ: ALTR) today announced the industry's first single-chip FPGA high definition (HD) Internet Protocol (IP) surveillance camera reference design, further providing extended FPGA solutions for the surveillance market. This unique solution uses Altera low-cost Cyclone® III or Cyclone IV FPGas and Eyelytics and Apical intellectual property, Support AltaSens' 1080P60 A3372E3-4T and Aptina's 720P60 MT9M033 HD Wide dynamic range (WDR) CMOS image sensor. This fully integrated solution helps surveillance equipment manufacturers reduce board area, reduce power consumption, improve flexibility and reduce development time compared to existing architectures using traditional digital signal processors and ASSP.
Traditional digital signal processors and ASSPs do not have the capability to process broadband data from 1080p and 720p WDR CMOS sensors (e.g., full HD gratings at 2200x1125 pixels x 16 + bits per pixel x 60 frames per second for greater than 2 Gbps bandwidth). Altera Cyclone family FPgas have the bandwidth and processing power required to handle the large amounts of data generated by today's HD WDR CMOS image sensors. In previous designs, HD WDR camera systems required fpGas to handle the "front-end" data processing, while the digital signal processor or ASSP handled the "back-end" video coding. All of these chips can now be replaced with an Altera? FPGA.
Altera HD Surveillance IP camera Reference design features include:
Apical ISP's best-in-class WDR processing "IRIdix" as well as advanced temporal and spatial noise suppression capabilities.
Apical "checkerboard de-mosaic" kernel for Altasens A3372E3-4T WDR mode.
"3A" features, such as auto-exposure and auto-white balance capabilities implemented on Altera Nios® II embedded soft core processors.
Eyelytics' H.264 video encoder has primary class 720 line per line 30 frames per second, or 1080 line per line 15 frames per second.
Altera's three-speed Ethernet MAC IP kernel.
By integrating all these functions into a single Altera FPGA without the need for a digital signal processor or ASSP, designers reduced board area, resulting in lower costs and power savings. The Altera single-chip solution reduces power consumption by more than 50 percent compared to previous designs.
This reference design bundled with a full set of intellectual property rights helped the designers jump-start camera development, cutting the development time by nearly a year. All camera designers need to do is customize the FPGA with their own specific functions, such as adding their own software for motion detection, panorama, pitch, and zoom control.
"Much like the video display industry, our surveillance market users want high-quality video images," said Michael Samuelian, director of Altera's Industrial and automotive business. Altera realized complete single chip solution, not only adapt to the from standard definition to high-definition, from standard CMOS sensor to the WDR CMOS sensor development trend, and to help monitor camera designers on the Internet protocol networks in a cost-effective transfer high-resolution images, thus the further development of the video surveillance technology."
Digital Core Supply Digital Input/Output Interfa…
Document Brief
A3372E3-4T...
1/3-inch Optical Format, 2.1 MP (1920 x 1080) at 60p in RGB...
Specifications...
Pixel Size Dark Current (60 C) Sensitivity SNR (2000 lux, f4, 200%, 60p)(Green channel, 3200K and CM500S IR cut filter) Color Filter 16 9 Array Format (pixels) 16 9 Array Format Full Resolution (pixels) 1080p Frame Rate Shutter Mode 2.7 m x 2.7 m 50 e/pixels/s 11,500 e/lux/s 59 dB...
Optimum Video Resolution in Low Light...
The 1/3-inch optical size of the AltaChrome A3372E3-4T image sensor allows uncompromised image quality at 1080p, thanks to its 2.7-m pixel pitch and AltaChrome technology....
Full 1080 Resolution at Up to 60 fps...
● 1080分辨率，60帧/秒
● RGB Bayer Pattern 1920 (H) x 1080 (V)
● 6mm diag (Type 1/3)
● 1968 (H) x 1096 (V) 60 fps
● Electronic Rolling Shutter Global Reset
● 12-bit 660 mW at 1080p60
● 395 mW at 1080p30
● 3.1 to 3.6 V 3.3 V typical 1.8 V 10%
● Raw RGB Stream
● 24-bit Dual-Port Output
● 24-bit Dual-Port Output 1.8 V
● CMOS Level thermal enhanced 48-pin CLCC
● -20℃ to 60 ℃
The AltaChrome A3372E3-4T scans progressively up to a true 60 fps to produce video that is devoid of artifacts. Programmable windowing enables multiple formats and proportionally higher frame rates. Sensor operations are compatible with the SMPTE 274 standard....
Superior On-Chip Reduction of Image Artifacts and Noise...
The AltaChrome A3372E3-4T contains automatic on-chip correction strategies and algorithms to eliminate artifacts that are unavoidably introduced by the analog components on a sensor. These corrections represent the third generation of innovations in digital iSoC design that AltaSens has developed to enhance image quality without increasing the cost, power consumption, or complexity of its sensors. The industry's deepest internal signal processing delivers a true 12-bit data stream to express the full dynamic range of an image, with functions to extract maximum image quality and provide smooth image texture, including Automatic Black Clamp for real-time calibration of black values in every frame. Automatic Column Fixed Pattern Noise (FPN) Suppression to eliminate variation among individual columns. Line Noise Suppression to remove instantaneous and systematic variation among pixel rows...
ADC Resolution Power Consumption Analog Supply...
Digital Core Supply Digital Input/Output Interfa...
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A3372E3-4T sensor from AltaSens, Inc. which is able to deliver high quality, uncompressed video at 1080p (1920x1080) or 720p (1280x720) formats and at various user selectable frame rates (25, 30, 50 and 60 frames per second).
艾睿电子公司、Altera 公司和 NewKen 技术公司日前宣布，通过艾睿电子公司为中国和台湾的用户提供业界第一款全 HD WDR 3G-SDI 全包解决方案。这一全包解决方案是由艾睿电子公司和 NewKen 联合开发，并由艾睿电子公司提供支持，包括 Altera Cyclone® IV FPGA 和 CPLD 安全芯片，支持 Apical 的 HD WDR 全图像信号处理(ISP)流水线 IP和 AltaSens 的 1080p60 A3372E3-4T 图像传感器，这一传感器提供质量非常高的图像。这有利于设计经验不足的工程师快速高效的完成视频监控摄像设计工程。
设计监控摄像机遇到的最大问题是系统集成。利用这一全包解决方案，研发团队避免了热沉和系统噪声等系统集成问题。而且，艾睿电子和 NewKen 公司提供灵活的业务模型，包括 ODM、完整的模块和一次许可开放源代码，从而满足了不同用户的需求。
目前市场上的参考设计基于标准 CMOS 图像传感器，受限于无法支持低亮度到阳光直射宽亮度级变化范围，导致视频目标全黑或者全白。全 HD WDR 3G-SDI全包解决方案基于 WDR CMOS 图像传感器，解决了这一问题。由于需要在图像传感器流水线(ISP)中处理这些图像传感器产生的大量数据(每色 20 位 x 1.2 Mpixels，每秒 60 帧)，数据量太大而无法实现片内处理。Altera Cyclone IV FPGA 能够处理大计算量算法，将原始图像数据转换为产生清晰视频图像所需要的标准数字输出。
Altera 亚太区副总裁兼总经理 Erhaan Shaikh 说：“我们非常高兴为用户提供高性能而且使用非常方便的全包监控摄像解决方案。利用这一解决方案，系统公司加速了向市场的迈进，同时通过向最终用户提供非常有价值的高级功能，突出产品优势。Altera Cyclone IV 系列 FPGA 在监控摄像应用中同时实现了低成本、低功耗和高性能，而且非常灵活。此外，Altera、艾睿电子和 NewKen 技术公司致力于为
用户提供优异的支持和服务，帮助他们取得成功。”
艾睿电子亚太区半导体市场副总裁林健中说：“我们非常高兴与 Altera 联合开发这一全 HD WDR 3G-SDI 全包解决方案。Altera 提供业界最好的现场可编程门阵列(FPGA)技术。这一全包解决方案结合了 Altera Cyclone® IV E FPGA 和 CPLD安全芯片，支持 Apical 的 HD WDR 全图像信号处理(ISP)流水线 IP 和 AltaSens 的1080p60 A3372E3-4T 图像传感器。结合 Altera 的业界第一款 HD WDR 视频监控芯片组，艾睿电子公司提供完整的全包解决方案、技术支持、专业的供应链管理，以及支持型号的全包解决方案模块，帮助生产商加速为市场推出更智能、性价比更高的下一代视频监控摄像系统。”
NewKen 技术有限公司总经理 Paul Chen 评论说：“就我们所知，目前市场上还没有能够完全满足 WDR 全 HD ISP 摄像机规范的 ASIC 芯片。为完成 WDR 3G-SDI 摄像机项目，不仅仅需要非常专业的系统工程经验，而且还要获得芯片供应商的支持和资源。NewKen 利用 FPGA 的设计灵活性, 实现 WDR 的功能, 更结合自有 3G-SDI的基础成果, 为业界设计出價格合理的全功能 WDR 3G-SDI 摄像解决方案。借助Altera 全面的设计资源以及艾睿电子公司的技术支持，我们决定在解决方案中使用Altera 的 FPGA。此外，三家公司联合提供全面的开发平台，降低了开发成本和风险，使这一产品能够迅速面市，得到更广泛的应用。”
单片FPGA高清晰互联网协议监视摄像机（Altera）
2010-06-25 16:56
Altera公司今天发布业界第一款单片FPGA高清晰(HD)互联网协议(IP)监视摄像机参考设计，进一步为监视市场提供扩展FPGA解决方案。这一独特的解决方案采用了Altera低成本Cyclone® III或者Cyclone IV FPGA以及Eyelytics和Apical的知识产权，支持AltaSens的1080p60 A3372E3-4T和Aptina的720p60 MT9M033 HD宽动态范围(WDR) CMOS图像传感器。与使用传统数字信号处理器和ASSP的现有体系结构相比，这一全集成解决方案帮助监视设备生产商减小电路板面积，降低功耗，提高了灵活性，缩短了开发时间。
传统的数字信号处理器和ASSP不具备处理1080p和720p WDR CMOS传感器宽带数据的能力(例如，全HD光栅为2200x1125像素x 16 + 每像素比特数 x 60帧每秒，得到大于2 Gbps的带宽)。Altera Cyclone系列 FPGA具有所需的带宽和处理能力，能够处理当今HD WDR CMOS图像传感器产生的大量数据。在以前的设计中，HD WDR摄像机系统要求FPGA完成“前端”数据处理，而数字信号处理器或者ASSP处理“后端”视频编码。现在，所有这些芯片都能够被一片Altera® FPGA所替代。
Altera HD监视IP摄像机参考设计的功能包括：
● Apical ISP同类最佳的WDR处理“iridix”以及高级时域和空间噪声抑制功能。
● Apical“棋盘去马赛克”内核，用于Altasens A3372E3-4T WDR模式。
● "3A"功能，例如，在Altera Nios® II嵌入式软核处理器上实现的自动曝光和自动白平衡功能。
● Eyelytics的H.264视频编码器，具有主要类720线逐行每秒30帧，或者1080线逐行每秒15帧编码能力。
● Altera的三速以太网MAC知识产权内核。
由于不需要数字信号处理器或者ASSP，将所有这些功能集成到一片Altera FPGA中，设计人员减小了电路板面积，从而降低了成本，节省了功耗。Altera单芯片解决方案的功耗比以前的设计降低了50％以上。
在这一参考设计中捆绑了全套的知识产权，帮助设计人员迅速启动摄像机开发，开发时间缩短了近一年。所有摄像机设计人员需要做的工作是采用自己的特定功能来定制FPGA，例如，加入自己的软件实现运动探测，全景、俯仰和放大控制等。
Altera工业和汽车业务总监Michael Samuelian说：“与视频显示行业非常相似，我们的监视市场用户希望有高质量的视频图像。Altera实现了完整的单芯片解决方案，不仅适应了从标准清晰度到高清晰，从标准CMOS传感器到WDR CMOS传感器的发展趋势，而且帮助监视摄像机设计人员以高性价比在互联网协议网络上传送高分辨率图像，从而进一步发展了视频监视技术。”
2010年6月23号，北京Altera分公司 (NASDAQ: ALTR)今天发布业界第一款单片FPGA高清晰(HD)互联网协议(IP)监视摄像机参考设计，进一步为监视市场提供扩展FPGA解决方案。这一独特的解决方案采用了Altera低成本Cyclone® III或者Cyclone IV FPGA以及Eyelytics和Apical的知识产权，支持AltaSens的1080p60 A3372E3-4T和Aptina的720p60 MT9M033 HD宽动态范围(WDR) CMOS图像传感器。与使用传统数字信号处理器和ASSP的现有体系结构相比，这一全集成解决方案帮助监视设备生产商减小电路板面积，降低功耗，提高了灵活性，缩短了开发时间。
传统的数字信号处理器和ASSP不具备处理1080p和720p WDR CMOS传感器宽带数据的能力(例如，全HD光栅为2200x1125像素x 16 + 每像素比特数 x 60帧每秒，得到大于2 Gbps的带宽)。Altera Cyclone系列 FPGA具有所需的带宽和处理能力，能够处理当今HD WDR CMOS图像传感器产生的大量数据。在以前的设计中，HD WDR摄像机系统要求FPGA完成“前端”数据处理，而数字信号处理器或者ASSP处理“后端”视频编码。现在，所有这些芯片都能够被一片Altera® FPGA所替代。
Altera HD监视IP摄像机参考设计的功能包括：
Apical ISP同类最佳的WDR处理“iridix”以及高级时域和空间噪声抑制功能。
Apical“棋盘去马赛克”内核，用于Altasens A3372E3-4T WDR模式。
"3A"功能，例如，在Altera Nios® II嵌入式软核处理器上实现的自动曝光和自动白平衡功能。
Eyelytics的H.264视频编码器，具有主要类720线逐行每秒30帧，或者1080线逐行每秒15帧编码能力。
Altera的三速以太网MAC知识产权内核。
由于不需要数字信号处理器或者ASSP，将所有这些功能集成到一片Altera FPGA中，设计人员减小了电路板面积，从而降低了成本，节省了功耗。Altera单芯片解决方案的功耗比以前的设计降低了50％以上。
在这一参考设计中捆绑了全套的知识产权，帮助设计人员迅速启动摄像机开发，开发时间缩短了近一年。所有摄像机设计人员需要做的工作是采用自己的特定功能来定制FPGA，例如，加入自己的软件实现运动探测，全景、俯仰和放大控制等。
Altera工业和汽车业务总监Michael Samuelian说：“与视频显示行业非常相似，我们的监视市场用户希望有高质量的视频图像。Altera实现了完整的单芯片解决方案，不仅适应了从标准清晰度到高清晰，从标准CMOS传感器到WDR CMOS传感器的发展趋势，而且帮助监视摄像机设计人员以高性价比在互联网协议网络上传送高分辨率图像，从而进一步发展了视频监视技术。”
A3372E3-4T文档简要
1/3英寸光学格式，2.1 MP (1920 x 1080)在60p的RGB…
规范
像素大小暗电流(60 C)灵敏度信噪比(2000 lux, f4, 200%， 60p)(绿色通道，3200K和CM500S红外切割滤光片)颜色滤光片16 9阵列格式(像素)16 9阵列格式全分辨率(像素)1080p帧率快门模式2.7 m x 2.7 m 50 e/ Pixel /s 11,500 e/lux/s 59 dB…
弱光下的最佳视频分辨率
1/3英寸光学尺寸的AltaChrome a3372a3 - 4t图像传感器，由于其2.7米像素间距和AltaChrome技术，在1080p的图像质量不受影响
● 1080分辨率，60帧/秒
● RGB Bayer Pattern 1920 (H) x 1080 (V)
● 6mm diag (Type 1/3)
● 1968 (H) x 1096 (V) 60 fps
● Electronic Rolling Shutter Global Reset
● 12-bit 660 mW at 1080p60
● 395 mW at 1080p30
● 3.1 to 3.6 V 3.3 V typical 1.8 V 10%
● Raw RGB Stream
● 24-bit Dual-Port Output
● 24-bit Dual-Port Output 1.8 V
● CMOS Level thermal enhanced 48-pin CLCC
● -20℃ to 60 ℃
AltaChrome A3372E3-4T扫描速度可达60帧/秒，产生无伪影的视频。 可编程窗口支持多种格式和比例更高的帧率。 传感器操作兼容SMPTE 274标准
优越的片上图像伪影和噪声降低
AltaChrome A3372E3-4T包含自动片上校正策略和算法，以消除传感器上的模拟组件不可避免地引入的伪影。 这些修正代表了AltaSens开发的数字iSoC设计的第三代创新，以在不增加成本、功耗或传感器复杂性的情况下提高图像质量。 业内最深入的内部信号处理提供真正的12位数据流，以表达图像的全动态范围，具有提取最大图像质量和提供平滑图像纹理的功能，包括自动黑钳(Automatic Black Clamp)，用于实时校准每一帧的黑值。 自动列固定模式噪声(FPN)抑制，以消除个别列之间的差异。 行噪声抑制，以消除瞬时和系统变化之间的像素行…
ADC分辨率功耗模拟电源…
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