The B6NS dual-channel deserialization chip receives video recording from the B6FS serialized liner Ambarella high performance HD,4K30FPS no latency multi-video streaming processing processor
2021-06-03 02:45:15
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The B6NS dual-channel deserialization chip receives video recording from the B6FS serialized liner Ambarella high performance HD,4K30FPS no latency multi-video streaming processing processor
B6NS De-Serializer Chip Datasheet
SUMMARY DESCRIPTION
The high-performance Ambarella B6 companion chips enable the transmission of HD and 4K video from remote camera modules via coaxial cables, without the introduction of latency or a loss of video quality. The B6 family of chips enables a wide range of automotive camera applications, including sur-round view, electronic mirrors, ADAS, and multi-channel video recording.
The Ambarella B6NS two-channel de-serializer chip receives one or two video streams from B6FS serializer chips or CMOS sensors, then outputs the combined video via an SlVS interface to an Ambarella SoC.
B6NS KEY FEATURES
※ Supports up to two channels of Serializer-Dese-rializer (SERDES) input
※ Supports up to 4Kp30 per input, or 1080p60 with HDR
※ performs all sensor synchronization tasks
※ Back-channel communication for programming sensor settings.
※ programmable video compression for reducing video data rate
※ 10 General purpose Input / Output (GpIO) pins
※ Multi-bit error correction
※ package：49pins, 0.65mm pitch BGA (5 mm x 5 mm)
1. B6NS OVERVIEW
This datasheet for the B6NS automotive de-serializer chip from Ambarella begins with a brief introduc-tion to the B6 family of co-processors (Section 1.1) and a summary of the key features of the two-channel-capable (Section 1.2). Chapter 2 describes the B6NS modules and interfaces. For pin details and electrical character-istics refer to Chapter 3 and Chapter 4, respectively. See Chapter 5 for package information and Chapter 6 for Ambarella contact and ordering details.
1.1 Introduction to B6 Co-Processors from Ambarella
Ambarella B6 companion chips enable multi-stream capture of up to 4Kp30 video for high-performance automo-tive applications including surround view, electronic mirrors, ADAS, and multi-channel video recording. Designed to support complex systems requiring multiple image sensors deployed over a vehicle, the B6 family of co-proces-sors serves as a highly efficient bridge between the digital signal processor (DSP) and up to four image sensors, allowing 360-degree coverage without the introduction of latency or a loss of video quality. Moreover, B6 chips
enable high-resolution Bayer RGB sensor data to be transferred using a simple coaxial cable. The 5x5-mm B6S
family is composed of the following co-processor types.
1. B6FS: (Far-end) The B6FS serializer chip captures Bayer RGB sensor input, serving as a bridge between a remotely-located sensor and a B6NS co-processor (or an A9AQ chip).
2. B6NS: (Near-end) The B6NS de-serializer chip combines the 1- or 2 channels of video stream from B6FS and sends it via MIpI-CSI or SlVS interface to an Ambarella SoC.
3. B6DFS: (Far-End) The B6DFS chip transfers the SERDES data received from A9AQ in MIpI-DSI or Open lDI format to connect to remote external displays. Refer to Figure 1-3 below.
Notes:
※ The B6FS serializer chip captures Bayer RGB sensor input, serving as a bridge between a remotely-located sensor and a B6NS chip (required to convert the SERDES stream into a MIpI-CSI or SlVS stream) or an A9AQ chip (B6NS is not required when using A9AQ).
※ B6DFS (far-end) display chip is required when outputting to one or two remote display using A9AQ. For a single local display, no display chips are required.
※ Coaxial cables (up to 10m) can be used to connect remote cameras/ displays using the B6 SERDES solution. In a multi-channel use case, if the cable is disconnected while the system is active, the specific channel will be dropped; while the rest of the system operation will not be disrupted.
1.2 B6N SIntroduction to the B6NS
Features of the B6NS de-serializer chip are as follows:
◎Data path
※ Serializer-Deserializer (SERDES) Input Mode: the Sensor → B6FS VIN → B6FS SERDES
TX→ B6NS SERDES RX → B6NS MIPI-CSI
※ The Merger Module reassembles SERDES data into a single video channel
※ Supports up to 4Kp30 or 1080p60 video resolution
◎ Video Stream Output (VOUT) Module.
※ Supports two output modes: MIpI-CSI and SlVS
※ Flexible back-channel communication
※ Selectable SSI/SpI or I2C/IDC interface
※ SSI/SpI or I2C/IDC sensor communications occur over the coaxial cable (i.e., no extra control wires required)
※ Supports multi-channel/sensor synchronization
※ Coaxial cable (up to 10 m) required for connection to B6FS
◎ programmable video decompressor
◎ 10 General purpose Input / Output (GpIO) pins
◎ Multi-bit error correction
◎ ECC encoder and decoder
◎ Five plls: Core, VOUT,Rx pHY, Tx0 pHY, and Tx1 pHY
◎ 49-pin, 0.65-mm pitch BGA package (5 mm x 5 mm)
◎ Operating temperature range: -20 C to +85 C
2. B6NS PERIPHERAL INTERFACES
2.1 Interfaces: Overview
This chapter provides summary information regarding the B6NS peripheral interfaces. The chapter is organized as follows:
※ (Section 2.2) Input Interface
※ (Section 2.3) Video Output (VOUT) Interface
※ (Section 2.4) IDCS Bridge Module
※ (Section 2.5) SSI Host Interface
2.2 B6NS Input Interface
The B6NS input interface supports two separate input instances simultaneously, each with independent program-ming and operation.
The features of the B6NS input interface are provided below.
◎ Two channels of input
◎ Serializer-Deserializer (SERDES) Input Mode: Up to 2-lane SERDES input from B6 far-side chips
※ Up to 4Kp30 per input
◎ pixel Reordering module allows programmable sequencing of the YUV (Y, Cb, Cr) components into the desired output order.
※ Support for RGB format included
2.3 B6NS Video Output (VOUT) Interface
The B6NS VOUT interface supports output modes: MIpI-CSI MIpI DSI, SlVS, and Open lDI. and SlVS
2.4 B6NS IDCS Bridge Module
The IDCS module is an I2C / IDC slave device that serves as a bridge between the B6NS internal bus and the Ambarella DSp. Features of the IDCS module include:
◎Three operational modes:
※ Standard mode: up to 100 kb/s data transfer rate
※ Fast mode: up to 400 kb/s data transfer rate
※ High-speed (Hs) mode: up to 3.4 Mb/s data transfer rate
◎Minimum clock frequency: 1.34 MHz in standard mode
2.5 B6NS SSI Host Interface
The B6NS chip provides a SSI host interface module, a slave interface which receives commands from the chip and transfers them into a AHB master signal (The data path is Ambarella SoC → B6NS SSI2 AHB interface → B6NS AHB bus → B6NS AHB peripherals). Features of the SSI host interface include:
※ Support for 8-bit data frames
